Block structure profiling in three dimensional memory
US8902661B1 · kind B1 · utility
20Cited by
16References
20Claims
0Family size
Assignee
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Key dates
| Filing date | May 21, 2014 |
| Grant date | Dec 2, 2014 |
| Priority date | — |
| Expiry date | May 21, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B69/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Memory hole diameter in a three dimensional memory array may be calculated from characteristics that are observed during programming. Suitable operating parameters may be selected for operating a block based on memory hole diameters. Hot counts of blocks may be adjusted according to memory hole size so that blocks that are expected to fail earlier because of small memory holes are more lightly used than blocks with larger memory holes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.