Integrated circuits having protruding source and drain regions and methods for forming integrated circuits
US8912606B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 24, 2012 |
| Grant date | Dec 16, 2014 |
| Priority date | — |
| Expiry date | May 24, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/822
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Methods for forming integrated circuits and integrated circuits are disclosed. The integrated circuits comprise gate structures overlying and transverse to one or more fins that are delineated by trenches formed in a semiconductor substrate. Protruding portions are formed in the trenches in between the gate electrode structure on exposed sidewall surfaces of the one or more fins. The trenches are filled with an insulating material between the protruding portions and the gate structures.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.