Method of forming contacts for devices with multiple stress liners
US9023696B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 26, 2011 |
| Grant date | May 5, 2015 |
| Priority date | — |
| Expiry date | Jun 26, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/0186
Abstract
Disclosed herein is a method of forming a semiconductor device. In one example, the method includes performing a first process operation to form a first etch stop layer above a first region of a semiconducting substrate where a first type of transistor device will be formed, and forming a first stress inducing layer at least above the first etch stop layer in the first region, wherein the first stress inducing layer is adapted to induce a stress in a channel region of the first type of transistor. The method further includes, after forming the first etch stop layer, performing a second process operation form a second etch stop layer above a second region of the substrate where a second type of transistor device will be formed, and forming a second stress inducing layer at least above the second etch stop layer in the second region, wherein the second stress inducing layer is adapted to induce a stress in a channel region of the second type of transistor. In one particular example, the first and second etch stop layers may have the same approximate thickness.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.