Reducing gate expansion after source and drain implant in gate last process
US9059218B2 · kind B2 · utility
1Cited by
4References
6Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 18, 2013 |
| Grant date | Jun 16, 2015 |
| Priority date | — |
| Expiry date | Sep 18, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/017
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor structure includes a semiconductor substrate, an active region and a dummy gate structure disposed over the active region. A sacrificial conformal layer, including a bottom oxide layer and a top nitride layer are provided over the dummy gate structure and active region to protect the dummy gate during source and drain implantation. The active region is implanted using dopants such as, a n-type dopant or a p-type dopant to create a source region and a drain region in the active region, after which the sacrificial conformal layer is removed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.