LDMOS FinFET device using a long channel region and method of manufacture
US9082852B1 · kind B1 · utility
Assignees
Inventors
Key dates
| Filing date | Dec 4, 2014 |
| Grant date | Jul 14, 2015 |
| Priority date | — |
| Expiry date | Dec 4, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/017
Abstract
A FinFET includes a semiconductor fin supporting a first transistor and a second transistor. A first transistor gate electrode extends over a first channel region of the fin and a second transistor gate electrode extends over a second channel region of the fin. Epitaxial growth material on a top of the fin forms a raised source region on a first side of the first transistor gate electrode, an intermediate region between a second side of the first transistor gate electrode and a first side of the second transistor gate electrode, and a raised drain region on a second side of the second transistor gate electrode. The first and second transistor gate electrodes are short circuit connected to each other, with the first transistor configured to have a first threshold voltage and the second transistor configured to have a second threshold voltage different from the first threshold voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.