Memory device comprising programmable command-and-address and/or data interfaces
US9117496B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 29, 2013 |
| Grant date | Aug 25, 2015 |
| Priority date | — |
| Expiry date | Jan 29, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory device comprising a programmable command-and-address (CA) interface and/or a programmable data interface is described. In an operational mode, two or more CA interfaces may be active. In another operational mode, at least one, but not all, CA interfaces may be active. In an operational mode, all of the data interfaces may be active. In another operational mode, at least one, but not all, data interfaces may be active. The memory device can include circuitry to select: an operational mode; a sub-mode within an operational mode; one or more CA interfaces as the active CA interface(s); a main CA interface from multiple active CA interfaces; and/or one or more data interfaces as the active data interfaces. The circuitry may perform these selection(s) based on one or more bits in one or more registers and/or one or more signals received on one or more pins.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.