Devices and methods of forming finFETs with self aligned fin formation

US9147696B2 · kind B2 · utility

Assignee

• GlobalFoundries Inc. · KY

Inventors

• Jing Wan · Malta, US
• Andy Wei · Queensbury, US
• Lun Zhao · Ballston Lake, US
• Dae Geun Yang · Watervliet, US
• Jin Ping Liu · Ballston Lake, US
• Tien Ying Luo · Austin, US
• Guillaume Bouche · Albany, US
• Mariappan Hariharaputhiran · Ballston Lake, US
• Churamani Gaire · Clifton Park, US

Key dates

• Filing date: Oct 1, 2013
• Grant date: Sep 29, 2015
• Expiry date: Nov 12, 2033

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D86/215
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

Devices and methods for forming semiconductor devices with FinFETs are provided. One method includes, for instance: obtaining an intermediate semiconductor device with a substrate and at least one shallow trench isolation region; depositing a hard mask layer over the intermediate semiconductor device; etching the hard mask layer to form at least one fin hard mask; and depositing at least one sacrificial gate structure over the at least one fin hard mask and at least a portion of the substrate. One intermediate semiconductor device includes, for instance: a substrate with at least one shallow trench isolation region; at least one fin hard mask over the substrate; at least one sacrificial gate structure over the at least one fin hard mask; at least one spacer disposed on the at least one sacrificial gate structure; and at least one pFET region and at least one nFET region grown into the substrate.