Three dimensional NAND device with silicide containing floating gates and method of making thereof
US9165940B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 12, 2014 |
| Grant date | Oct 20, 2015 |
| Priority date | — |
| Expiry date | Nov 12, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/665
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of making a monolithic three dimensional NAND string, including providing a stack of alternating first material layers and second material layers different from the first material layer over a substrate, the stack comprising at least one opening containing a charge storage material comprising a silicide layer, a tunnel dielectric on the charge storage material in the at least one opening, and a semiconductor channel on the tunnel dielectric in the at least one opening, selectively removing the second material layers without removing the first material layers from the stack and forming control gates between the first material layers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.