Patent · US Active

Sub-oxide interface layer for two-terminal memory

US9166163B2 · kind B2 · utility

23Cited by
1References
29Claims
0Family size

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Key dates

Filing dateSep 13, 2013
Grant dateOct 20, 2015
Priority date
Expiry dateDec 6, 2033

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10N70/883

Abstract

Provision of fabrication, construction, and/or assembly of a two-terminal memory device is described herein. The two-terminal memory device can include an active region with a silicon bearing layer, an interface layer, and an active metal layer. The interface layer can created comprising a non-stoichimetric sub-oxide that can be a combination of multiple silicon and/or silicon oxide layers with an aggregate chemical formula of SiOX, where X can be a non-integer greater than zero and less than 2. The sub-oxide can be created in a variety of ways, including various techniques related to growing the sub-oxide, depositing the sub-oxide, or transforming an extant film into the sub-oxide.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.