Spacer replacement for replacement metal gate semiconductor devices
US9171927B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 26, 2013 |
| Grant date | Oct 27, 2015 |
| Priority date | — |
| Expiry date | Mar 26, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/667
Abstract
A method comprising steps of removing a first dielectric material, including a hard mask layer and one or more spacer material layers, from a semiconductor device having a sacrificial gate whose sidewalls being covered by said spacer material layers, and a raised source and a raised drain region with both, together with said sacrificial gate, being covered by said hard mask layer, wherein the removing is selective to the sacrificial gate, raised source region and raised drain region and creates a void between each of the raised source region, raised drain region and sacrificial gate. The method includes depositing a conformal layer of a second dielectric material to the semiconductor device, wherein the second material conforms in a uniform layer to the raised source region, raised drain region and sacrificial gate, and fills the void between each of the raised source region, raised drain region and sacrificial gate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.