Die assembly on thin dielectric sheet
US9177831B2 · kind B2 · utility
2Cited by
1References
15Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 30, 2013 |
| Grant date | Nov 3, 2015 |
| Priority date | — |
| Expiry date | Sep 30, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A die assembly formed on a thin dielectric sheet is described. In one example, a first and a second die have interconnect areas. A dielectric sheet, such as glass, silicon, or oxidized metal is applied over the interconnect areas of dies. Conductive vias are formed in the dielectric sheet to connect with pads of the interconnect areas. A build-up layer includes routing to connect pads of the first die interconnect area to pads of the second die interconnect area through the conductive vias and a cover is applied over the dies, the dielectric sheet, and the build-up layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.