Strained finFET with an electrically isolated channel
US9190520B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 9, 2014 |
| Grant date | Nov 17, 2015 |
| Priority date | — |
| Expiry date | Sep 9, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
Abstract
A fin structure includes an optional doped well, a disposable single crystalline semiconductor material portion, and a top semiconductor portion formed on a substrate. A disposable gate structure straddling the fin structure is formed, and end portions of the fin structure are removed to form end cavities. Doped semiconductor material portions are formed on sides of a stack of the disposable single crystalline semiconductor material portion and a channel region including the top semiconductor portion. The disposable single crystalline semiconductor material portion may be replaced with a dielectric material portion after removal of the disposable gate structure or after formation of the stack. The gate cavity is filled with a gate dielectric and a gate electrode. The channel region is stressed by the doped semiconductor material portions, and is electrically isolated from the substrate by the dielectric material portion.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.