Methods for forming vertical and sharp junctions in finFET structures

US9202920B1 · kind B1 · utility

Assignees

• STMICROELECTRONICS, INC. · US
• International Business Machines Corporation · US
• GlobalFoundries Inc. · KY

Inventors

• Qing Liu · Guilderland, US
• Chun-Chen Yeh · Clifton Park, US
• Ruilong Xie · Niskayuna, US
• Xiuyu Cai · San Diego, US

Key dates

• Filing date: Jul 31, 2014
• Grant date: Dec 1, 2015
• Expiry date: Jul 31, 2034

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/018

Abstract

Methods and structures for forming short-channel finFETs with vertical and abrupt source and drain junctions are described. During fabrication, source and drain regions of the finFET may be recessed vertically and laterally under gate spacers. A buffer having a high dopant density may be formed on vertical sidewalls of the channel region after recessing the fin. Raised source and drain structures may be formed at the recessed source and drain regions. The raised source and drain structures may impart strain to the channel region.