Forming structures on resistive substrates
US9257324B2 · kind B2 · utility
0Cited by
9References
17Claims
0Family size
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Key dates
| Filing date | Mar 31, 2014 |
| Grant date | Feb 9, 2016 |
| Priority date | — |
| Expiry date | Sep 5, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/859
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A substrate includes a first region having a first resistivity, for optimizing a field effect transistor, a second region having a second resistivity, for optimizing an npn subcollector of a bipolar transistor device and triple well, a third region having a third resistivity, with a high resistivity for a passive device, a fourth region, substantially without implantation, to provide low perimeter capacitance for devices.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.