Surface mount package for a semiconductor integrated device, related assembly and manufacturing process
US9257372B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Sep 19, 2013 |
| Grant date | Feb 9, 2016 |
| Priority date | — |
| Expiry date | Sep 19, 2033 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02P70/50
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A surface mount package of a semiconductor device, has: an encapsulation, housing at least one die including semiconductor material; and electrical contact leads, protruding from the encapsulation to be electrically coupled to contact pads of a circuit board; the encapsulation has a main face designed to face a top surface of the circuit board, which is provided with coupling features designed for mechanical coupling to the circuit board to increase a resonant frequency of the mounted package. The coupling features envisage at least a first coupling recess defined within the encapsulation starting from the main face, designed to be engaged by a corresponding coupling element fixed to the circuit board, thereby restricting movements of the mounted package.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.