Semiconductor device including vertically spaced semiconductor channel structures and related methods
US9263338B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Oct 23, 2013 |
| Grant date | Feb 16, 2016 |
| Priority date | — |
| Expiry date | Nov 15, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/834
Abstract
A method for making a semiconductor device may include forming, on a substrate, at least one stack of alternating first and second semiconductor layers. The first semiconductor layer may comprise a first semiconductor material and the second semiconductor layer may comprise a second semiconductor material. The first semiconductor material may be selectively etchable with respect to the second semiconductor material. The method may further include removing portions of the at least one stack and substrate to define exposed sidewalls thereof, forming respective spacers on the exposed sidewalls, etching recesses through the at least one stack and substrate to define a plurality of spaced apart pillars, selectively etching the first semiconductor material from the plurality of pillars leaving second semiconductor material structures supported at opposing ends by respective spacers, and forming at least one gate adjacent the second semiconductor material structures.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.