Interconnect structures with fully aligned vias
US9324650B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 15, 2014 |
| Grant date | Apr 26, 2016 |
| Priority date | — |
| Expiry date | Aug 15, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming a fully aligned via connecting two metal lines on different Mx levels by forming a recessed opening above a first metal line in a first ILD; forming a cap on the first ILD and in the recessed openings; forming a second ILD on the cap; forming a metal trench hardmask above the second ILD, forming a metal trench pattern in the metal trench hardmask; forming a via pattern that is self aligned to the metal trench pattern and above a portion of the first metal line; forming a via opening exposing the first metal line by transferring the via pattern and metal trench pattern to lower levels, the via pattern is self-aligned to the recessed opening; and forming a via and a third metal line in the via opening and the transferred metal trench pattern, respectively.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.