Methods for fabricating FinFET integrated circuits with simultaneous formation of local contact openings
US9397004B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 27, 2014 |
| Grant date | Jul 19, 2016 |
| Priority date | — |
| Expiry date | Jan 31, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/011
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for fabricating a finFET integrated circuit includes providing a finFET integrated circuit structure including a fin structure, a replacement metal gate structure having a silicon nitride cap disposed over and in contact with the fin structure, a contact structure including a tungsten material also disposed over and in contact with the fin structure, and an insulating layer disposed over the replacement metal gate structure and the contact structure. The method further includes forming a first opening in the insulating layer over the replacement gate structure and a second opening in the insulating layer over the contact structure. Forming the first and second openings includes exposing the FinFET integrated circuit structure to a single extreme ultraviolet lithography patterning. Still further, the method includes removing a portion of the silicon nitride material of the replacement metal gate structure and forming a metal fill material in the first and second openings.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.