10 nm alternative N/P doped fin for SSRW scheme
US9455204B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 1, 2015 |
| Grant date | Sep 27, 2016 |
| Priority date | — |
| Expiry date | Jun 1, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/853
Abstract
A method of introducing N/P dopants in PMOS and NMOS fins at the SSRW layer without complicated processing and the resulting device are provided. Embodiments include forming a plurality of p-type and n-type fins on a substrate, the plurality of p-type and n-type fins formed with an ISSG or pad oxide layer; performing an n-well implant into the substrate through the ISSG or pad oxide layer; performing a first SRPD on the ISSG or pad oxide layer of the plurality of p-type fins; performing a p-well implant into the substrate through the ISSG or pad oxide layer; performing a second SRPD on the ISSG or pad oxide layer of the plurality of n-type fins; and driving the n-well and p-well implants and the SRPD dopants into a portion of the plurality of p-type and n-type fins.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.