MOSFET with asymmetric self-aligned contact
US9466570B1 · kind B1 · utility
Assignees
Inventors
Key dates
| Filing date | May 9, 2016 |
| Grant date | Oct 11, 2016 |
| Priority date | — |
| Expiry date | May 9, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L23/53209
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes a source and drain on a substrate; a first and second gate on the source, and the second gate and a third gate on the drain; a source contact over the source and between the first and second gates, the source contact including first and second portions, the first portion in contact with the source and extending between the first and second gates, and the second portion contacting the first portion and extending over the first and second gates; and a drain contact formed over the drain and between the second and third gates, the drain contact including first and second portions, the first portion contacting the drain, extending between second and third gates, and recessed with respect to the first portion of the source contact, and the second portion in contact with the first portion and extending between and over the second and third gates.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.