Method to improve reliability of replacement gate device
US9472643B2 · kind B2 · utility
3Cited by
7References
10Claims
0Family size
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Key dates
| Filing date | Jan 13, 2015 |
| Grant date | Oct 18, 2016 |
| Priority date | — |
| Expiry date | Jan 13, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/511
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of fabricating a replacement gate stack for a semiconductor device includes the following steps after removal of a dummy gate: growing a high-k dielectric layer over the area vacated by the dummy gate; depositing a thin metal layer over the high-k dielectric layer; depositing a sacrificial layer over the thin metal layer; performing a first rapid thermal anneal; removing the sacrificial layer; and depositing a metal layer of low resistivity metal for gap fill.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.