FinFET device including a uniform silicon alloy fin
US9478663B2 · kind B2 · utility
3Cited by
0References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 29, 2014 |
| Grant date | Oct 25, 2016 |
| Priority date | — |
| Expiry date | Oct 29, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/822
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method includes forming a fin on a semiconductor substrate and forming recesses on sidewalls of the fin. A silicon alloy material is formed in the recesses. A thermal process is performed to define a silicon alloy fin portion from the silicon alloy material and the fin. A semiconductor device includes a substrate, a fin defined on the substrate and an isolation structure disposed adjacent the fin. A first portion of the fin extending above the isolation structure has a substantially vertical sidewall and a different material composition than a second portion of the fin not extending above the isolation structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.