Channel protection during fin fabrication
US9496371B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 7, 2015 |
| Grant date | Nov 15, 2016 |
| Priority date | — |
| Expiry date | Oct 7, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/3081
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for protecting channels during fin fabrication. Fins are formed on a substrate. A conformal liner layer (or layers) is applied on the fins. Active portions of a semiconductor device are patterned in the fins using a first organic planarizing material. The first organic planarizing material is stripped. The length of the fins is adjusted using a second organic planarizing material. The second organic planarizing material is stripped. The conformal liner layer(s) is stripped.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.