Patent · US Active

Method of dicing a wafer and semiconductor chip

US9570352B2 · kind B2 · utility

2Cited by
1References
15Claims
0Family size

Assignee

Inventors

Key dates

Filing dateDec 10, 2015
Grant dateFeb 14, 2017
Priority date
Expiry dateDec 10, 2035

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2221/6834
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A method of dicing a wafer may include forming a plurality of active regions in a wafer, each active region including at least one electronic component, the active regions extending from a first surface of the wafer into the wafer by a height and being separated by separation regions, the separation regions being free from metal, forming at least one trench in the wafer by plasma etching in at least one separation region from the first surface of the wafer. The at least one trench is extending into the wafer farther than the plurality of active regions. The method may further include processing a remaining portion of the wafer in the separation region to separate the wafer into individual chips.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.