Method and structure for SRB elastic relaxation
US9576857B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 2, 2016 |
| Grant date | Feb 21, 2017 |
| Priority date | — |
| Expiry date | Mar 2, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/83
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming SRB finFET fins first with a cut mask that is perpendicular to the subsequent fin direction and then with a cut mask that is parallel to the fin direction and the resulting device are provided. Embodiments include forming a SiGe SRB on a substrate; forming a Si layer over the SRB; forming an NFET channel and a SiGe PFET channel in the Si layer; forming cuts through the NFET and PFET channels, respectively, and the SRB down to the substrate, the cuts formed on opposite ends of the substrate and perpendicular to the NFET and PFET channels; forming fins in the SRB and the NFET and PFET channels, the fins formed perpendicular to the cuts; forming a cut between the NFET and PFET channels, the cut formed parallel to the fins; filling the cut with oxide; and recessing the oxide down to the SRB.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.