Sub-oxide interface layer for two-terminal memory
US9601690B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 19, 2015 |
| Grant date | Mar 21, 2017 |
| Priority date | — |
| Expiry date | Oct 19, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/883
Abstract
Provision of fabrication, construction, and/or assembly of a two-terminal memory device is described herein. The two-terminal memory device can include an active region with a silicon bearing layer, an interface layer, and an active metal layer. The interface layer can created comprising a non-stoichiometric sub-oxide that can be a combination of multiple silicon and/or silicon oxide layers with an aggregate chemical formula of SiOX, where X can be a non-integer greater than zero and less than 2. The sub-oxide can be created in a variety of ways, including various techniques related to growing the sub-oxide, depositing the sub-oxide, or transforming an extant film into the sub-oxide.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.