Package structure to enhance yield of TMI interconnections
US9613933B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 5, 2014 |
| Grant date | Apr 4, 2017 |
| Priority date | — |
| Expiry date | Mar 5, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/37001
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An apparatus is described that includes a substrate and a mold compound disposed on the substrate. The semiconductor die is embedded within the mold compound and is electrically coupled to lands on the substrate. Solder balls are disposed around the semiconductor die on the substrate. Each of the solder balls have a solid coating thereon. The solid coating contains a cleaning agent to promote its solder ball's coalescence with another solder ball. Respective vias are formed in the mold compound that expose the solder balls and their respective solid coatings. In combined or alternate embodiments outer edges of the mold compound have smaller thickness than regions of the mold compound between the vias and the semiconductor die. In combined or alternate embodiments micro-channels exist between the solder balls and the mold compound.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.