Semiconductor structure and method of forming the same
US9613969B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 7, 2015 |
| Grant date | Apr 4, 2017 |
| Priority date | — |
| Expiry date | Jul 7, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/856
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention provides a semiconductor structure, including a substrate, a plurality of fin structures, a plurality of gate structures, a dielectric layer and a plurality of contact plugs. The substrate has a memory region. The fin structures are disposed on the substrate in the memory region, each of which stretches along a first direction. The gate structures are disposed on the fin structures, each of which stretches along a second direction. The dielectric layer is disposed on the gate structures and the fin structures. The contact plugs are disposed in the dielectric layer and electrically connected to a source/drain region in the fin structure. From a top view, the contact plug has a trapezoid shape or a pentagon shape. The present invention further provides a method for forming the same.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.