Method of forming self aligned continuity blocks for mandrel and non-mandrel interconnect lines
US9679809B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 22, 2016 |
| Grant date | Jun 13, 2017 |
| Priority date | — |
| Expiry date | Mar 22, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/068
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming a pattern for interconnect lines in an integrated circuit includes providing a structure having a first lithographic stack, a mandrel layer and a pattern layer disposed over a dielectric stack. Patterning the structure to form mandrels in the mandrel layer and disposing a spacer layer over the mandrels. Etching the spacer layer to form spacers disposed on sidewalls of the mandrels. The spacers and mandrels defining beta and gamma regions. A beta region includes a beta block mask portion and a gamma region includes a gamma block mask portion of the pattern layer. The method also includes etching a beta pillar over the beta block mask portion and etching a gamma pillar over the gamma block mask portion. The method also includes etching the structure to form a pattern in the pattern layer, the pattern including the gamma and beta block mask portions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.