Forming 3D memory cells after word line replacement

US9716101B2 · kind B2 · utility

Assignee

• Sandisk Technologies, Inc. · US

Inventors

• Zhenyu Lu · Hubei, CN
• Hiro Kinoshita · San Jose, US
• Daxin Mao · Cupertino, US
• Johann Alsmeier · San Jose, US
• Wenguang Shi · Milpitas, US
• Yingda Dong · San Jose, US
• Henry Chien · San Jose, US
• Kensuke Yamaguchi · Yokkaichi, JP
• Xiaolong Hu · Shandong, CN

Key dates

• Filing date: Oct 30, 2015
• Grant date: Jul 25, 2017
• Expiry date: Oct 30, 2035

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10B43/50

Abstract

Techniques for forming 3D memory arrays are disclosed. Memory openings are filled with a sacrificial material, such as silicon or nitride. Afterwards, a replacement technique is used to remove nitride from an ONON stack and replace it with a conductive material such as tungsten. Afterwards, memory cell films are formed in the memory openings. The conductive material serves as control gates of the memory cells. The control gate will not suffer from corner rounding. ONON shrinkage is avoided, which will prevent control gate shrinkage. Block oxide between the charge storage region and control gate may be deposited after control gate replacement, so the uniformity is good. Block oxide may be deposited after control gate replacement, so TiN adjacent to control gates can be thicker to prevent fluorine attacking the insulator between adjacent control gates. Therefore, control gate to control gate shorting is prevented.