Patent · US Active

Layout effect characterization for integrated circuits

US9740813B1 · kind B1 · utility

4Cited by

3References

15Claims

0Family size

Assignee

International Business Machines Corporation · US

Inventors

Martin Eckert · Metzingen, DE
Thomas Gentner · Eppelheim, DE
Jens Kuenzer · Eppelheim, DE
Antje Mueller · Eppelheim, DE
Thomas Strach · Wildberg, DE
Otto A. Torreiter · Echterdingen, DE

Key dates

Filing date	Oct 13, 2016
Grant date	Aug 22, 2017
Priority date	—
Expiry date	Oct 13, 2036

Classification

Technology area (CPC G)Physics
CPC primaryG06F2119/12
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

An aspect includes forming a layout effect characterization circuit by incorporating a plurality of inverting device chains including a reference chain and one or more chains having a different inverting device arrangement and a same number of inverting devices per chain in an integrated circuit layout. A low pass filter is coupled to an output of the inverting device chains to produce a filtered output. An output capture circuit is coupled to the filtered output to enable a comparison of a captured filtered output of the one or more chains having the different inverting device arrangement to a captured filtered output of the reference chain.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.