Thomas Strach
21Patents
4h-index
28Co-inventors
59Inventor score
Filing activity: Jul 19, 2005 → Oct 8, 2019
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US11112846B2 | Predictive on-chip voltage simulation to detect near-future under voltage conditions | Physics | 11 | Active |
| US9141421B2 | Reducing power grid noise in a processor while minimizing performance loss | Emerging Cross-Sectional Technologies | 6 | Active |
| US9804231B2 | Power noise histogram of a computer system | Physics | 5 | Active |
| US9740813B1 | Layout effect characterization for integrated circuits | Physics | 4 | Active |
| US9673179B1 | Discrete electronic device embedded in chip module | Electricity | 4 | Active |
| US9839131B2 | Embedding a discrete electrical device in a printed circuit board | Electricity | 3 | Active |
| US7266788B2 | Via/BSM pattern optimization to reduce DC gradients and pin current density on single and multi-chip modules | Electricity | 2 | Expired |
| US10145892B2 | Increasing the resolution of on-chip measurement circuits | Physics | 1 | Active |
| US9980385B2 | Discrete electronic device embedded in chip module | Electricity | 1 | Active |
| US9904748B1 | Layout effect characterization for integrated circuits | Physics | 0 | Active |
| US10461715B1 | Mitigating power noise using a current supply | Physics | 0 | Active |
| US9679099B2 | De-coupling capacitance placement | Physics | 0 | Active |
| US9684759B2 | De-coupling capacitance placement | Physics | 0 | Active |
| US10149388B2 | Method for embedding a discrete electrical device in a printed circuit board | Electricity | 0 | Active |
| US10481662B2 | Distributed on chip network to mitigate voltage droops | Emerging Cross-Sectional Technologies | 0 | Active |
| US10725517B2 | Distributed on chip network to mitigate voltage droops | Emerging Cross-Sectional Technologies | 0 | Active |
| US10114914B2 | Layout effect characterization for integrated circuits | Physics | 0 | Active |
| US11586267B2 | Fine resolution on-chip voltage simulation to prevent under voltage conditions | Electricity | 0 | Active |
| US10734317B2 | Discrete electronic device embedded in chip module | Electricity | 0 | Active |
| US9146772B2 | Reducing power grid noise in a processor while minimizing performance loss | Emerging Cross-Sectional Technologies | 0 | Active |
| US10354946B2 | Discrete electronic device embedded in chip module | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.