Method of modifying the strain state of a semiconducting structure with stacked transistor channels
US9853130B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 22, 2016 |
| Grant date | Dec 26, 2017 |
| Priority date | — |
| Expiry date | Feb 22, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/018
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of modifying a strain state of a first channel structure in a transistor is provided, said structure being formed from superposed semiconducting elements, the method including providing on a substrate at least one first semiconducting structure formed from a semiconducting stack including alternating elements based on at least one first semiconducting material and elements based on at least one second semiconducting material different from the first material; then removing portions of the second material from the first semiconducting structure by selective etching, the removed portions forming at least one empty space; filling the empty space with a dielectric material; forming a straining zone on the first semiconducting structure based on a first strained material having an intrinsic strain; and performing thermal annealing to cause the dielectric material to creep, and to cause a change in a strain state of the elements based on the first material.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.