Crosscheck Technology, Inc.
13Patents
0Active
13Granted
30Portfolio score
Filing activity: Jul 13, 1988 → Oct 8, 1993
Most-cited patents
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US4937826A | Method and apparatus for sensing defects in integrated circuit elements | Physics | 40 | Expired |
| US5495486A | Method and apparatus for testing integrated circuits | Physics | 31 | Expired |
| US5065090A | "Method for testing integrated circuits having a grid-based, ""cross-check"" t e" | Physics | 31 | Expired |
| US4975640A | Method for operating a linear feedback shift register as a serial shift register with a crosscheck grid structure | Physics | 24 | Expired |
| US5471152A | Storage element for delay testing | Physics | 23 | Expired |
| US5037771A | Method for implementing grid-based crosscheck test structures and the structures resulting therefrom | Electricity | 21 | Expired |
| US5202624A | Interface between IC operational circuitry for coupling test signal from internal test matrix | Physics | 18 | Expired |
| US5157627A | Method and apparatus for setting desired signal level on storage element | Physics | 17 | Expired |
| US5179534A | Method and apparatus for setting desired logic state at internal point of a select storage element | Physics | 14 | Expired |
| US5206862A | Method and apparatus for locally deriving test signals from previous response signals | Physics | 11 | Expired |
| US5230001A | Method for testing a sequential circuit by splicing test vectors into sequential test pattern | Physics | 10 | Expired |
| US5038349A | "Method for reducing masking of errors when using a grid-based, ""cross-check"" test structure" | Physics | 4 | Expired |
| US5436801A | Method and structure for routing power for optimum cell utilization with two and three level metal in a partially predesigned integrated circuit | Electricity | 1 | Expired |
Source: USPTO / EPO open patent data. Counts and citation impact are objective bibliographic measures.