Alexei V. Galatenko
16Patents
3h-index
18Co-inventors
49Inventor score
Filing activity: Nov 21, 2003 → Sep 13, 2011
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US8160242B2 | Efficient implementation of arithmetical secure hash techniques | Electricity | 6 | Active |
| US8452006B2 | Cryptographic processing using a processor | Electricity | 4 | Active |
| US7401313B2 | Method and apparatus for controlling congestion during integrated circuit design resynthesis | Physics | 4 | Active |
| US8447988B2 | Hash processing using a processor | Electricity | 3 | Active |
| US7398486B2 | Method and apparatus for performing logical transformations for global routing | Physics | 3 | Active |
| US7496870B2 | Method of selecting cells in logic restructuring | Physics | 3 | Active |
| US7103865B2 | Process and apparatus for placement of megacells in ICs design | Physics | 2 | Expired |
| US7003739B2 | Method and apparatus for finding optimal unification substitution for formulas in technology library | Physics | 1 | Expired |
| US7146591B2 | Method of selecting cells in logic restructuring | Physics | 1 | Expired |
| US7257791B2 | Multiple buffer insertion in global routing | Physics | 1 | Expired |
| US9417847B2 | Low depth combinational finite field multiplier | Physics | 1 | Active |
| US7111267B2 | Process and apparatus to assign coordinates to nodes of logical trees without increase of wire lengths | Physics | 0 | Expired |
| US8302083B2 | Architecture and implementation method of programmable arithmetic controller for cryptographic applications | Physics | 0 | Active |
| US8831221B2 | Unified architecture for crypto functional units | Electricity | 0 | Active |
| US7246336B2 | Ramptime propagation on designs with cycles | Physics | 0 | Expired |
| US7568175B2 | Ramptime propagation on designs with cycles | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.