Ananthan Raghunathan
8Patents
2h-index
13Co-inventors
37Inventor score
Filing activity: May 11, 2016 → Dec 30, 2019
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US9799660B1 | Stable and reliable FinFET SRAM with improved beta ratio | Electricity | 7 | Active |
| US9852260B2 | Method and recording medium of reducing chemoepitaxy directed self-assembled defects | Emerging Cross-Sectional Technologies | 4 | Active |
| US10114921B2 | Method and recording medium of reducing chemoepitaxy directed self-assembled defects | Emerging Cross-Sectional Technologies | 2 | Active |
| US10606980B2 | Method and recording medium of reducing chemoepitaxy directed self-assembled defects | Emerging Cross-Sectional Technologies | 1 | Active |
| US10496780B1 | Dynamic model generation for lithographic simulation | Electricity | 1 | Active |
| US10366996B2 | Stable and reliable FinFET SRAM with improved beta ratio | Electricity | 0 | Active |
| US10949601B2 | Reducing chemoepitaxy directed self-assembled defects | Emerging Cross-Sectional Technologies | 0 | Active |
| US10146036B2 | Semiconductor wafer inspection using care area group-specific threshold settings for detecting defects | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.