Bruce Millar
38Patents
12h-index
25Co-inventors
81Inventor score
Filing activity: Apr 29, 1994 → Feb 20, 2020
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6442644B1 | Memory system having synchronous-link DRAM (SLDRAM) devices and controller | Emerging Cross-Sectional Technologies | 382 | Expired |
| US6510503B2 | High bandwidth memory interface | Emerging Cross-Sectional Technologies | 294 | Expired |
| US5917760A | De-skewing data signals in a memory system | Physics | 221 | Expired |
| US6087868A | Digital delay locked loop | Electricity | 89 | Expired |
| US6779097B2 | High bandwidth memory interface | Emerging Cross-Sectional Technologies | 78 | Expired |
| US7299330B2 | High bandwidth memory interface | Emerging Cross-Sectional Technologies | 71 | Expired |
| US6337590B1 | Digital delay locked loop | Electricity | 70 | Expired |
| US5870049A | Current mode digital to analog converter | Electricity | 58 | Expired |
| US5945886A | High-speed bus structure for printed circuit boards | Electricity | 44 | Expired |
| US5652733A | Command encoded delayed clock generator | Physics | 28 | Expired |
| US5497115A | Flip-flop circuit having low standby power for driving synchronous dynamic random access memory | Physics | 25 | Expired |
| US7761831B2 | ASIC design using clock and power grid standard cell | Electricity | 15 | Active |
| US5633607A | Edge triggered set-reset flip-flop (SRFF) | Electricity | 12 | Expired |
| US7834654B2 | Dynamic impedance control for input/output buffers | Electricity | 12 | Active |
| US8035413B2 | Dynamic impedance control for input/output buffers | Electricity | 8 | Active |
| US7889580B2 | Memory system having incorrupted strobe signals | Electricity | 7 | Active |
| US7652932B2 | Memory system having incorrupted strobe signals | Electricity | 6 | Active |
| US8654573B2 | High bandwidth memory interface | Emerging Cross-Sectional Technologies | 6 | Active |
| US7551012B2 | Phase shifting in DLL/PLL | Electricity | 5 | Active |
| US6853231B2 | Timing vernier using a delay locked loop | Electricity | 5 | Expired |
| US7248531B2 | Voltage down converter for high speed memory | Physics | 4 | Expired |
| US7129760B2 | Timing vernier using a delay locked loop | Electricity | 3 | Expired |
| US8250297B2 | High bandwidth memory interface | Emerging Cross-Sectional Technologies | 2 | Active |
| US8847623B2 | Dynamic impedance control for input/output buffers | Electricity | 2 | Active |
| US7593281B2 | Voltage down converter for high speed memory | Physics | 2 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.