Daniel Dever
12Patents
3h-index
14Co-inventors
57Inventor score
Filing activity: Oct 31, 2001 → Mar 20, 2023
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US9059945B2 | Work request processor | Physics | 6 | Active |
| US9870328B2 | Managing buffered communication between cores | Physics | 6 | Active |
| US9838471B2 | Method and an apparatus for work request arbitration in a network processor | Physics | 6 | Active |
| US11036643B1 | Mid-level instruction cache | Physics | 3 | Active |
| US9665505B2 | Managing buffered communication between sockets | Physics | 3 | Active |
| US11119929B2 | Low latency inter-chip communication mechanism in multi-chip processing system | Physics | 2 | Active |
| US9811467B2 | Method and an apparatus for pre-fetching and processing work for procesor cores in a network processor | Physics | 2 | Active |
| US6624663B2 | Low threshold voltage silicon-on-insulator clock gates | Electricity | 1 | Expired |
| US9529640B2 | Work request processor | Physics | 0 | Active |
| US12019552B2 | Low latency inter-chip communication mechanism in a multi-chip processing system | Physics | 0 | Active |
| US11327759B2 | Managing low-level instructions and core interactions in multi-core processors | Physics | 0 | Active |
| US11620223B2 | Low latency inter-chip communication mechanism in a multi-chip processing system | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.