David G. Carson
16Patents
16h-index
28Co-inventors
74Inventor score
Filing activity: Aug 25, 1981 → Jun 3, 1997
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US5283904A | Multi-processor programmable interrupt controller system | Physics | 354 | Expired |
| US4503535A | Apparatus for recovery from failures in a multiprocessing system | Physics | 148 | Expired |
| US4480307A | Interface for use between a memory and components of a module switching apparatus | Physics | 148 | Expired |
| US4438494A | Apparatus of fault-handling in a multiprocessing system | Physics | 122 | Expired |
| US5911051A | High-throughput interconnect allowing bus transactions based on partial access requests | Physics | 98 | Expired |
| US5410710A | Multiprocessor programmable interrupt controller system adapted to functional redundancy checking processor systems | Physics | 90 | Expired |
| US5696976A | Protocol for interrupt bus arbitration in a multi-processor system | Physics | 77 | Expired |
| US5555420A | Multiprocessor programmable interrupt controller system with separate interrupt bus and bus retry management | Physics | 75 | Expired |
| US4473880A | Arbitration means for controlling access to a bus shared by a number of modules | Physics | 69 | Expired |
| US5495615A | Multiprocessor interrupt controller with remote reading of interrupt control registers | Physics | 59 | Expired |
| US5613128A | Programmable multi-processor interrupt controller system with a processor integrated local interrupt controller | Physics | 49 | Expired |
| US4503534A | Apparatus for redundant operation of modules in a multiprocessing system | Physics | 40 | Expired |
| US6317803A | High-throughput interconnect having pipelined and non-pipelined bus transaction modes | Physics | 34 | Expired |
| US4829425A | Memory-based interagent communication mechanism | Physics | 31 | Expired |
| US5758169A | Protocol for interrupt bus arbitration in a multi-processor system | Physics | 29 | Expired |
| US5701496A | Multi-processor computer system with interrupt controllers providing remote reading | Physics | 17 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.