Dinkar Singh
17Patents
6h-index
29Co-inventors
62Inventor score
Filing activity: Jul 29, 2002 → Oct 15, 2012
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6911375B2 | Method of fabricating silicon devices on sapphire with wafer bonding at low temperature | Electricity | 48 | Expired |
| US8012820B2 | Ultra-thin SOI CMOS with raised epitaxial source and drain and embedded SiGe PFET extension | Electricity | 37 | Active |
| US6740535B2 | Enhanced T-gate structure for modulation doped field effect transistors | Electricity | 28 | Expired |
| US7628974B2 | Control of carbon nanotube diameter using CVD or PECVD growth | Emerging Cross-Sectional Technologies | 13 | Expired |
| US6972440B2 | Enhanced T-gate structure for modulation doped field effect transistors | Electricity | 11 | Expired |
| US7374998B2 | Selective incorporation of charge for transistor channels | Electricity | 8 | Active |
| US8288826B2 | Semiconductor-on-insulator (SOI) structures including gradient nitrided buried oxide (BOX) | Electricity | 4 | Active |
| US7396776B2 | Semiconductor-on-insulator (SOI) structures including gradient nitrided buried oxide (BOX) | Electricity | 4 | Active |
| US7659583B2 | Ultrathin SOI CMOS devices employing differential STI liners | Electricity | 2 | Active |
| US7713837B2 | Low temperature fusion bonding with high surface energy using a wet chemical treatment | Electricity | 2 | Active |
| US8101150B2 | Control of carbon nanotube diameter using CVD or PECVD growth | Emerging Cross-Sectional Technologies | 2 | Active |
| US8546920B2 | Semiconductor-on-insulator (SOI) structures including gradient nitrided buried oxide (BOX) | Electricity | 1 | Active |
| US8021956B2 | Ultrathin SOI CMOS devices employing differential STI liners | Electricity | 1 | Active |
| US7687863B2 | Selective incorporation of charge for transistor channels | Electricity | 0 | Active |
| US8053373B2 | Semiconductor-on-insulator(SOI) structures including gradient nitrided buried oxide (BOX) | Electricity | 0 | Active |
| US7566631B2 | Low temperature fusion bonding with high surface energy using a wet chemical treatment | Electricity | 0 | Active |
| US7776624B2 | Method for improving semiconductor surfaces | Emerging Cross-Sectional Technologies | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.