Echere Iroaga
27Patents
6h-index
18Co-inventors
66Inventor score
Filing activity: Apr 1, 1998 → Feb 28, 2022
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6710959B1 | Input pole compensation for a disk drive read head | Physics | 14 | Expired |
| US11314107B2 | Optical modulation skew adjustment systems and methods | Electricity | 7 | Active |
| US6587296B1 | Capacitor bias recovery methodology | Physics | 7 | Expired |
| US6163419A | Method and apparatus for demodulating a servo burst signal in a hard disk drive | Physics | 7 | Expired |
| US7061307B2 | Current mirror compensation circuit and method | Electricity | 6 | Expired |
| US6396346B1 | Low noise magneto-resistive read head preamplifier | Electricity | 6 | Expired |
| US6751034B1 | Preamplifier read recovery parade | Physics | 5 | Expired |
| US10784845B2 | Error detection and compensation for a multiplexing transmitter | Electricity | 5 | Active |
| US11309876B2 | Digitally programmable analog duty-cycle correction circuit | Electricity | 4 | Active |
| US6445242B2 | Fuse selectable pinout package | Electricity | 3 | Expired |
| US6819515B1 | Method and circuit for eliminating glitches in a disk drive read head | Physics | 3 | Expired |
| US10243762B1 | Analog delay based fractionally spaced n-tap feed-forward equalizer for wireline and optical transmitters | Electricity | 3 | Active |
| US6700719B2 | Preamp reader design for high resistance read heads | Physics | 3 | Expired |
| US6549357B1 | Selectable input pole compensation for a disk drive read head | Physics | 3 | Expired |
| US10447254B1 | Analog delay based T-spaced N-tap feed-forward equalizer for wireline and optical transmitters | Electricity | 3 | Active |
| US9036730B2 | Method and apparatus for peak-to-average ratio reduction | Electricity | 1 | Active |
| US6594101B1 | Read head protection circuit and method | Physics | 1 | Expired |
| US11777702B2 | Closed loop lane synchronization for optical modulation | Electricity | 1 | Active |
| US6735034B1 | Relative timing sequence for reader amplifiers | Physics | 1 | Expired |
| US6522492B1 | Write to read switching time trim circuit | Physics | 1 | Expired |
| US6856481B2 | Apparatus and method for providing a read signal for an information processing device | Physics | 0 | Expired |
| US7369080B1 | Method and system for driver circuits of capacitive loads | Electricity | 0 | Active |
| US10606293B2 | On-chip voltage regulator providing extended range of voltage supplies | Physics | 0 | Active |
| US10700888B2 | CMOS quarter-rate multiplexer for high-speed serial links | Electricity | 0 | Active |
| US12045072B2 | System and method for calibration of multi-channel transceivers | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.