Eric S. Chung
62Patents
9h-index
51Co-inventors
81Inventor score
Filing activity: Oct 25, 1996 → Feb 12, 2024
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US10167800B1 | Hardware node having a matrix vector unit with block-floating point processing | Physics | 71 | Active |
| US10140252B2 | Hardware node with matrix-vector multiply tiles for neural network processing | Emerging Cross-Sectional Technologies | 47 | Active |
| US10027543B2 | Reconfiguring an acceleration component among interconnected acceleration components | Physics | 21 | Active |
| US9983938B2 | Locally restoring functionality at acceleration components | Physics | 21 | Active |
| US9674090B2 | In-line network accelerator | Electricity | 19 | Active |
| US9317482B2 | Universal FPGA/ASIC matrix-vector multiplication architecture | Physics | 19 | Active |
| US10338925B2 | Tensor register files | Physics | 13 | Active |
| US10540588B2 | Deep neural network processing on hardware accelerators with stacked memory | Emerging Cross-Sectional Technologies | 10 | Active |
| US10372456B2 | Tensor processor instruction set architecture | Physics | 9 | Active |
| US10452971B2 | Deep neural network partitioning on servers | Physics | 7 | Active |
| US10296392B2 | Implementing a multi-component service using plural hardware acceleration components | Physics | 7 | Active |
| US9652327B2 | Restoring service acceleration | Physics | 7 | Active |
| US9606836B2 | Independently networkable hardware accelerators for increased workflow optimization | Physics | 7 | Active |
| US9847980B2 | Protecting communications with hardware accelerators for increased workflow security | Electricity | 6 | Active |
| US10331445B2 | Multifunction vector processor circuits | Emerging Cross-Sectional Technologies | 6 | Active |
| US10452995B2 | Machine learning classification on hardware accelerators with stacked memory | Emerging Cross-Sectional Technologies | 6 | Active |
| US10129153B2 | In-line network accelerator | Electricity | 5 | Active |
| US11556762B2 | Neural network processor based on application specific synthesis specialization parameters | Physics | 3 | Active |
| US9888095B2 | Lightweight transport protocol | Electricity | 3 | Active |
| US10320677B2 | Flow control and congestion management for acceleration components configured to accelerate a service | Electricity | 3 | Active |
| US10346819B2 | Mobile device applications, other applications and associated kiosk-based systems and methods for facilitating coin saving | Physics | 3 | Active |
| US10795678B2 | Matrix vector multiplier with a vector register file comprising a multi-port memory | Physics | 3 | Active |
| US5689155A | Electronic stabilizer having a variable frequency soft start circuit | Emerging Cross-Sectional Technologies | 2 | Expired |
| US9760159B2 | Dynamic power routing to hardware accelerators | Emerging Cross-Sectional Technologies | 2 | Active |
| US10467324B2 | Data packing techniques for hard-wired multiplier circuits | Physics | 1 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.