Erik A. Nelson
10Patents
7h-index
19Co-inventors
59Inventor score
Filing activity: Oct 10, 2000 → Sep 20, 2011
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6856569B2 | Method and system for merging multiple fuse decompression serial bitstreams to support auxiliary fuseblow capability | Physics | 19 | Expired |
| US6577548B1 | Self timing interlock circuit for embedded DRAM | Physics | 13 | Expired |
| US6708298B2 | Method for guaranteeing a minimum data strobe valid window and a minimum data valid window for DDR memory devices | Physics | 8 | Expired |
| US6658604B1 | Method for testing and guaranteeing that skew between two signals meets predetermined criteria | Physics | 8 | Expired |
| US7103814B2 | Testing logic and embedded memory in parallel | Physics | 8 | Expired |
| US6449200B1 | Duty-cycle-efficient SRAM cell test | Physics | 8 | Expired |
| US7073100B2 | Method for testing embedded DRAM arrays | Physics | 7 | Expired |
| US7237165B2 | Method for testing embedded DRAM arrays | Physics | 6 | Expired |
| US8854073B2 | Methods and apparatus for margin testing integrated circuits using asynchronously timed varied supply voltage and test patterns | Physics | 5 | Active |
| US8125840B2 | Reference level generation with offset compensation for sense amplifier | Physics | 2 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.