Hartvig Ekner
16Patents
7h-index
9Co-inventors
59Inventor score
Filing activity: May 23, 1996 → Dec 28, 2016
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6289445A | Circuit and method for initiating exception routines using implicit exception checking | Physics | 32 | Expired |
| US5867681A | Microprocessor having register dependent immediate decompression | Physics | 30 | Expired |
| US6092159A | Implementation of configurable on-chip fast memory using the data cache RAM | Physics | 28 | Expired |
| US5794010A | Method and apparatus for allowing execution of both compressed instructions and decompressed instructions in a microprocessor | Physics | 24 | Expired |
| US6189093A | System for initiating exception routine in response to memory access exception by storing exception information and exception bit within architectured register | Physics | 24 | Expired |
| US7237097B2 | Partial bitwise permutations | Physics | 15 | Expired |
| US7599981B2 | Binary polynomial multiplier | Physics | 7 | Expired |
| US6826681B2 | Instruction specified register value saving in allocated caller stack or not yet allocated callee stack | Physics | 7 | Expired |
| US6412066B1 | Microprocessor employing branch instruction to set compression mode | Physics | 7 | Expired |
| US7984028B2 | System and method for application of hash function in telecommunication and networking | Physics | 6 | Active |
| US7281123B2 | Restoring register values from stack memory using instruction with restore indication bit and de-allocation frame size stack pointer offset | Physics | 5 | Expired |
| US7739484B2 | Instruction encoding to indicate whether to store argument registers as static registers and return address in subroutine stack | Physics | 1 | Active |
| US8566487B2 | System and method for creating a scalable monolithic packet processing engine | Electricity | 1 | Active |
| US8868801B2 | System and method for creating a scalable monolithic packet processing engine | Electricity | 0 | Active |
| US9807034B2 | System and method for creating a scalable monolithic packet processing engine | Electricity | 0 | Active |
| US10649486B1 | Apparatus and methods for accurate latency measurements in integrated circuits | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.