Jason A. T. Jones
32Patents
9h-index
55Co-inventors
78Inventor score
Filing activity: Jun 7, 1995 → Mar 8, 2024
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6691216B2 | Shared program memory for use in multicore DSP devices | Emerging Cross-Sectional Technologies | 41 | Expired |
| US5903746A | Apparatus and method for automatically sequencing clocks in a data processing system when entering or leaving a low power state | Physics | 32 | Expired |
| US6789183B1 | Apparatus and method for activation of a digital signal processor in an idle mode for interprocessor transfer of signal groups in a digital signal processing unit | Emerging Cross-Sectional Technologies | 30 | Expired |
| US5838934A | Host port interface | Physics | 26 | Expired |
| US6438720B1 | Host port interface | Physics | 19 | Expired |
| US6167466A | Multi-channel serial port with programmable features | Physics | 17 | Expired |
| US5734927A | System having registers for receiving data, registers for transmitting data, both at a different clock rate, and control circuitry for shifting the different clock rates | Physics | 14 | Expired |
| US6609163B1 | Multi-channel serial port with programmable features | Physics | 13 | Expired |
| US6701388B1 | Apparatus and method for the exchange of signal groups between a plurality of components in a digital signal processor having a direct memory access controller | Physics | 9 | Expired |
| US5952863A | Circuit and method for generating non-overlapping clock signals for an integrated circuit | Electricity | 8 | Expired |
| US6892266B2 | Multicore DSP device having coupled subsystem memory buses for global DMA access | Physics | 8 | Expired |
| US7546392B2 | Data transfer with single channel controller controlling plural transfer controllers | Physics | 5 | Active |
| US10747692B2 | Image processing accelerator | Emerging Cross-Sectional Technologies | 3 | Active |
| US11030144B2 | Peripheral component interconnect (PCI) backplane connectivity system on chip (SoC) | Physics | 3 | Active |
| US10818067B1 | GPU assist using DSP pre-processor system and method | Physics | 3 | Active |
| US10949357B2 | Real time input/output address translation for virtualized systems | Physics | 2 | Active |
| US11715188B1 | Permanent fault detection for imaging and vision hardware accelerators | Electricity | 2 | Active |
| US11163861B2 | Machine learning model with watermarked weights | Physics | 1 | Active |
| US11436024B2 | Independent operation of an ethernet switch integrated on a system on a chip | Electricity | 1 | Active |
| US11237991B2 | Image processing accelerator | Emerging Cross-Sectional Technologies | 1 | Active |
| US11704391B2 | Machine learning model with watermarked weights | Physics | 1 | Active |
| US10803651B2 | Methods and apparatus to perform graphics processing on combinations of graphic processing units and digital signal processors | Physics | 0 | Active |
| US12111778B2 | Image processing accelerator | Emerging Cross-Sectional Technologies | 0 | Active |
| US11551399B2 | Methods and apparatus to perform graphics processing on combinations of graphic processing units and digital signal processors | Physics | 0 | Active |
| US11763513B2 | DGPU assist using DSP pre-processor system and method | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.