John E. Murray
15Patents
13h-index
23Co-inventors
74Inventor score
Filing activity: Jul 7, 1980 → Aug 9, 1991
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US5142634A | Branch prediction | Physics | 207 | Expired |
| US4888679A | Method and apparatus using a cache and main memory for both vector processing and scalar processing by prefetching cache blocks including vector data elements | Physics | 124 | Expired |
| US4985825A | System for delaying processing of memory access exceptions until the execution stage of an instruction pipeline of a virtual memory system based digital computer | Physics | 94 | Expired |
| US5222223A | Method and apparatus for ordering and queueing multiple memory requests | Physics | 88 | Expired |
| US5125083A | Method and apparatus for resolving a variable number of potential memory access conflicts in a pipelined computer system | Physics | 82 | Expired |
| US5109495A | Method and apparatus using a source operand list and a source operand pointer queue between the execution unit and the instruction decoding and operand processing units of a pipelined data processor | Physics | 78 | Expired |
| US5113515A | Virtual instruction cache system using length responsive decoded instruction shifting and merging with prefetch buffer outputs to fill instruction buffer | Physics | 57 | Expired |
| US4982402A | Method and apparatus for detecting and correcting errors in a pipelined computer system | Physics | 52 | Expired |
| US5142633A | Preprocessing implied specifiers in a pipelined processor | Physics | 50 | Expired |
| US5148528A | Method and apparatus for simultaneously decoding three operands in a variable length instruction when one of the operands is also of variable length | Physics | 48 | Expired |
| US5167026A | Simultaneously or sequentially decoding multiple specifiers of a variable length pipeline instruction based on detection of modified value of specifier registers | Physics | 46 | Expired |
| US5142631A | System for queuing individual read or write mask and generating respective composite mask for controlling access to general purpose register | Physics | 45 | Expired |
| US5349651A | System for translation of virtual to physical addresses by operating memory management processor for calculating location of physical address in memory concurrently with cache comparing virtual addresses for translation | Physics | 43 | Expired |
| US4380797A | Two level store with many-to-one mapping scheme | Physics | 7 | Expired |
| US4548002A | Roof for a mobile home or the like | Fixed Constructions | 3 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.