John Stephen Atherton
8Patents
1h-index
8Co-inventors
44Inventor score
Filing activity: May 1, 1998 → Feb 20, 2024
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6133805A | Isolation in multi-layer structures | Electricity | 30 | Expired |
| US7795641B2 | Diode assembly | Electricity | 0 | Active |
| US12363983B2 | Layout techniques and optimization for power transistors | Electricity | 0 | Active |
| US11990343B2 | Gate metal formation on gallium nitride or aluminum gallium nitride | Electricity | 0 | Active |
| US8105888B2 | Diode assembly | Electricity | 0 | Active |
| US7939866B2 | Field effect transistor | Electricity | 0 | Active |
| US11929408B2 | Layout techniques and optimization for power transistors | Electricity | 0 | Active |
| US11417644B2 | Integration of multiple discrete GaN devices | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.