Maher Amer
32Patents
6h-index
4Co-inventors
62Inventor score
Filing activity: Mar 29, 1999 → Jun 29, 2022
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US8713379B2 | System and method of interfacing co-processors and input/output devices via a main memory system | Physics | 79 | Active |
| US8738853B2 | Load reduction dual in-line memory module (LRDIMM) and method for programming the same | Physics | 67 | Active |
| US8452917B2 | Load reduction dual in-line memory module (LRDIMM) and method for programming the same | Physics | 63 | Active |
| US7333422B2 | Optimized FFT/IFFT module | Electricity | 33 | Expired |
| US9552175B2 | System and method for providing a command buffer in a memory system | Electricity | 11 | Active |
| US10580465B2 | System and method for providing a configurable timing control for a memory system | Physics | 6 | Active |
| US9015408B2 | Load reduction dual in-line memory module (LRDIMM) and method for programming the same | Physics | 6 | Active |
| US6728744B2 | Wide word multiplier using booth encoding | Physics | 5 | Expired |
| US9444495B2 | System and method of interfacing co-processors and input/output devices via a main memory system | Physics | 4 | Active |
| US9449651B2 | System and method for offsetting the data buffer latency of a device implementing a JEDEC standard DDR-4 LRDIMM chipset | Physics | 3 | Active |
| US6141289A | Structure of random access memory formed of multibit cells | Physics | 3 | Expired |
| US7415112B2 | Parallel scrambler/descrambler | Electricity | 3 | Expired |
| US7765457B2 | Parallel convolutional encoder | Electricity | 2 | Active |
| US10168954B2 | System and method of interfacing co-processors and input/output devices via a main memory system | Physics | 1 | Active |
| US9575908B2 | System and method for unlocking additional functions of a module | Physics | 1 | Active |
| US11061841B2 | System and method for implementing a multi-threaded device driver in a computer system | Physics | 1 | Active |
| US7623585B2 | Systems and modules for use with trellis-based decoding | Electricity | 1 | Expired |
| US6766346B2 | System and method for computing a square of a number | Physics | 1 | Expired |
| US8972805B2 | System and method of interfacing co-processors and input/output devices via a main memory system | Physics | 1 | Active |
| US7185268B2 | Memory system and method for use in trellis-based decoding | Electricity | 1 | Expired |
| US8107357B2 | Optimized FFT/IFFT module | Electricity | 1 | Active |
| US11422749B2 | System and method of interfacing co-processors and input/output devices via a main memory system | Physics | 0 | Active |
| US7917835B2 | Memory system and method for use in trellis-based decoding | Electricity | 0 | Active |
| US11062743B2 | System and method for providing a configurable timing control for a memory system | Physics | 0 | Active |
| US10725704B2 | System and method of interfacing co-processors and input/output devices via a main memory system | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.