Mark E. Jost
52Patents
17h-index
27Co-inventors
84Inventor score
Filing activity: Nov 2, 1990 → Dec 7, 2009
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US5605857A | Method of forming a bit line over capacitor array of memory cells and an array of bit line over capacitor array of memory cells | Emerging Cross-Sectional Technologies | 157 | Expired |
| US5705838A | Array of bit line over capacitor array of memory cells | Emerging Cross-Sectional Technologies | 90 | Expired |
| US5686747A | Integrated circuits comprising interconnecting plugs | Emerging Cross-Sectional Technologies | 87 | Expired |
| US5821140A | Method of forming a bit line over capacitor array of memory cells and an array of bit line over capacitor array of memory cells | Emerging Cross-Sectional Technologies | 84 | Expired |
| US5563089A | Method of forming a bit line over capacitor array of memory cells and an array of bit line over capacitor array of memory cells | Emerging Cross-Sectional Technologies | 84 | Expired |
| US5702990A | Method of forming a bit line over capacitor array of memory cells and an array of bit line over capacitor array of memory cells | Emerging Cross-Sectional Technologies | 77 | Expired |
| US5604147A | Method of forming a cylindrical container stacked capacitor | Emerging Cross-Sectional Technologies | 69 | Expired |
| US6046094A | Method of forming wafer alignment patterns | Emerging Cross-Sectional Technologies | 63 | Expired |
| US5900660A | Method of forming a bit line over capacitor array of memory cells and an array of bit line over capacitor array of memory calls | Emerging Cross-Sectional Technologies | 59 | Expired |
| US6110774A | Method of forming a bit line over capacitor array of memory cells and an array of bit line over capacitor array of memory cells | Emerging Cross-Sectional Technologies | 53 | Expired |
| US5258318A | Method of forming a BiCMOS SOI wafer having thin and thick SOI regions of silicon | Emerging Cross-Sectional Technologies | 49 | Expired |
| US5128271A | High performance vertical bipolar transistor structure via self-aligning processing techniques | Emerging Cross-Sectional Technologies | 43 | Expired |
| US6150257A | Plasma treatment of an interconnect surface during formation of an interlayer dielectric | Electricity | 36 | Expired |
| US5739068A | Semiconductor processing method of making electrical contact to a node received within a mass of insulating dielectric material | Electricity | 34 | Expired |
| US5700732A | Semiconductor wafer, wafer alignment patterns and method of forming wafer alignment patterns | Emerging Cross-Sectional Technologies | 29 | Expired |
| US5925937A | Semiconductor wafer, wafer alignment patterns | Emerging Cross-Sectional Technologies | 17 | Expired |
| US5869403A | Semiconductor processing methods of forming a contact opening to a semiconductor substrate | Electricity | 17 | Expired |
| US5789304A | Method of forming a capacitor | Emerging Cross-Sectional Technologies | 16 | Expired |
| US5966611A | Semiconductor processing for forming capacitors by etching polysilicon and coating layer formed over the polysilicon | Electricity | 14 | Expired |
| US5888877A | Method of forming recessed container cells | Electricity | 11 | Expired |
| US5962885A | Method of forming a capacitor and a capacitor construction | Emerging Cross-Sectional Technologies | 11 | Expired |
| US5994237A | Semiconductor processing methods of forming a contact opening to a semiconductor substrate | Electricity | 10 | Expired |
| US6418008B1 | Enhanced capacitor shape | Electricity | 9 | Expired |
| US5311539A | Roughened sidewall ridge for high power fundamental mode semiconductor ridge waveguide laser operation | Electricity | 8 | Expired |
| US6025271A | Method of removing surface defects or other recesses during the formation of a semiconductor device | Electricity | 8 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.