Mark W. Hervin
21Patents
16h-index
24Co-inventors
81Inventor score
Filing activity: Oct 18, 1993 → Nov 29, 2012
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6654373B1 | Content aware network apparatus | Electricity | 181 | Expired |
| US6381242B1 | Content processor | Electricity | 172 | Expired |
| US5471598A | Data dependency detection and handling in a microprocessor with write buffer | Physics | 109 | Expired |
| US6957258B2 | Policy gateway | Electricity | 97 | Expired |
| US6910134B1 | Method and device for innoculating email infected with a virus | Physics | 76 | Expired |
| US6138230A | Processor with multiple execution pipelines using pipe stage state information to control independent movement of instructions between pipe stages of an execution pipeline | Physics | 65 | Expired |
| US7272115B2 | Method and apparatus for enforcing service level agreements | Electricity | 45 | Expired |
| US6205560A | Debug system allowing programmable selection of alternate debug mechanisms such as debug handler, SMI, or JTAG | Physics | 44 | Expired |
| US6073231A | Pipelined processor with microcontrol of register translation hardware | Physics | 41 | Expired |
| US5805879A | In a pipelined processor, setting a segment access indicator during execution stage using exception handling | Physics | 32 | Expired |
| US5838897A | Debugging a processor using data output during idle bus cycles | Physics | 27 | Expired |
| US7002974B1 | Learning state machine for use in internet protocol networks | Electricity | 26 | Expired |
| US5596735A | Circuit and method for addressing segment descriptor tables | Physics | 23 | Expired |
| US5835949A | Method of identifying and self-modifying code | Physics | 21 | Expired |
| US5524222A | Microsequencer allowing a sequence of conditional jumps without requiring the insertion of NOP or other instructions | Physics | 20 | Expired |
| US5961575A | Microprocessor having combined shift and rotate circuit | Physics | 18 | Expired |
| US5742755A | Error-handling circuit and method for memory address alignment double fault | Physics | 9 | Expired |
| US5644741A | Processor with single clock decode architecture employing single microROM | Physics | 8 | Expired |
| US7031316B2 | Content processor | Electricity | 4 | Expired |
| US5794026A | Microprocessor having expedited execution of condition dependent instructions | Physics | 4 | Expired |
| US9256548B2 | Rule-based virtual address translation for accessing data | Physics | 1 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.